1. Field of the Invention
The present invention relates to pulse-width modulation power conversion circuits which implement current ripple reduction and lower voltage stress on both of the active and passive semiconductor switch with minimum component count.
2. Description of the Related Art
Current ripple reduction has been implemented in a variety of circuits, some of which are described in U.S. Pat. No. 5,038,263, issued on Aug. 6, 1991, to Joseph Marrero and Christopher Peng. The voltage stress on the switch is the sum of the input voltage, the transformer reset voltage, and the turn-off voltage spike introduced by the leakage inductance. By series-connecting two switches, a ripple steering circuit has been invented in U.S. Pat. No. 5,786,990, issued on Jul. 28, 1998, to Joseph Marrero. Although the turn-off voltage is shared, voltage stress improvement is limited due to the leakage inductance energy.
Therefore, it is desirable to alleviate the voltage spike as well as to reduce the current ripple in the converter design. Several converters, such as in FIG. 12 of “Snubber Circuits: Theory, Design and Application,” Philip C. Todd, Ti seminar 900 topic 2, May 1993, in U.S. Pat. No. 5,523,936, issued on Jun. 4, 1996, to the inventor of the present invention, and in U.S. Pat. No. 6,005,779, issued on Dec. 21, 1999, to Isaac Cohen, are proposed to be able to recycle the leakage energy. Consequently, the voltage spike is eliminated and the voltage stress on the switch can be reduced to the sum of the input voltage and the transformer reset voltage only.
To decrease the conduction loss, further reduce the voltage stress is thus desired because lower voltage rating semiconductor switch is accompanied with a lower RDS(on) on MOEFET or a lower VF on diode. As a result, the efficiency of the converter can be improved. Circuitry invented in U.S. Pat. No. 5,640,318, issued on Jun. 17, 1997, to the inventor of the present invention as an improved power conversion circuit of the U.S. Pat. No. 5,523,936. As shown in FIG. 1, the circuit has lower voltage stress on the MOSFET than that in conventional power conversion circuits designed to produce the same output voltage in response to the same input voltage. However, it possesses two drawbacks. First and foremost, a higher voltage rating (at least two times input voltage) clamped diode (Dc) is needed. Secondly, the switch S2 should be turned off first to assure that both MOSFETs are clamped to the input voltage. Or else the switch S1 may suffer a higher voltage stress.
Therefore, it is desirable to assure a lower voltage rating semiconductor switch (MOSFET or diode) can be used and reduced current ripple performance can be achieved with minimum component count in the converter design.
However, it had not been known until the present invention how to achieve the objectives noted in the preceding paragraphs.